1. Field of the Invention
The present invention relates to a semiconductor device such as a nonvolatile memory device and a method of fabricating the same, and more particularly, to a flash memory device having a self-aligned floating gate and a method of fabricating the same.
2. Description of the Related Art
In general, semiconductor memory devices storing data can be classified into volatile memory devices and nonvolatile memory devices. Volatile memory devices lose data stored in them when power is cut off, while nonvolatile memory devices retain stored data even when the power is cut off. Accordingly, nonvolatile memory devices, such as flash memory devices, are widely used in mobile storage devices, mobile telecommunication systems, and other devices that may experience power loss.
Meanwhile, as the size and power consumption of electronic systems are gradually reduced, the required integration density of flash memory devices increases. Consequently, gates constituting a unit cell of a flash memory device should also be scaled down. One technique proposed in recent years to scale down the gates includes forming floating and control gates on an active region of a fin structure to fabricate the flash memory cell.
A typical technique in forming a floating gate employs a conventional patterning process. The patterning process requires a process margin to prepare for potential alignment errors in a photolithography process. In other words, there are many limitations in fabricating the scaled-down floating gate. In order to cope with alignment error, a technique of foaming the floating gate using self-align technology has been researched.
A nonvolatile memory device having the fin structure and a method of fabricating the same are disclosed in U.S. Pat. No. 6,657,252 B2 entitled “FinFET CMOS with NVRAM capability” to Fried et al. According to Fried et al., an insulated floating gate is disposed on the sidewalls of a fin body, and an insulated control gate is disposed to cover the floating gate. Further, Fried et al. provides an example where the floating gate can be formed self-aligned with the fin body. The floating gate is formed by forming a polysilicon layer covering the fin body and then anisotropically etching the polysilicon layer. In this case, the thickness of the floating gate can depend on the height of the fin body and the deposition thickness of the polysilicon layer. However, there is a limitation in adjusting the thickness of the floating gate.
Another method of fabricating a nonvolatile memory device is disclosed in US Patent Publication No. 2004-0099900 entitled “Semiconductor Device and Method of Manufacturing the same” to Iguchi et al.
Nevertheless, techniques of forming a flash memory device having a self-aligned floating gate require continuous improvement.